Journal Publication

  1. MALATHI L, L.Malathi, A.Bharathi, A.N.Jayanthi,"FPGA Implementation in Robust FFT Architecture for Signal Processing Applications", International Journal of Innovative Technology and Exploring Engineering (IJITEE), 9(8), pp.325-330 , 2020.
  2. MALATHI L, L. Malathi, G. Priyanka, M. Sneha, S. Vidhya Priya,"Smart Go-Cart with Automatic Billing System Through RFID And Zigbee", International Journal of Current Engineering and Scientific Research (IJCESR), 7(3), pp.2394-0697, 2020.
  3. MALATHI L, L . Malathi, Dr. A. Bharathi, Dr. A. N. Jayanthi,"FPGA Implementation of Area Efficient CMOS Multiplier using Fast Kogge Stone Look Ahead Logarithmic Adder", International Journal of Recent Technology and Engineering (IJRTE), 8(4), pp.8445-8449, 2019.
  4. MALATHI L, L.Malathi, Dr.A.Bharathi, Dr.A.N.Jayanthi,"FPGA Implementation of Area Efficient CMOS Multiplier using Fast Kogge Stone Look Ahead Logarithmic Adder", International Journal of Recent Technology and Engineering (IJRTE), (Scopus Indexed), 8(4), pp.8445-8449, 2019.
  5. MALATHI L, L . Malathi, Dr. A. Bharathi, Dr. A. N. Jayanthi,"Review on Fast Complex Multiplication Algorithms And Implementation", International Journal of Current Engineering and Scientific Research (IJCESR), 6(5), pp.22-27, 2019.
  6. MALATHI L, L. Malathi, Dr. A. Bharathi, Dr. A. N. Jayanthi,"Review on Fast Complex Multiplication Algorithms and Implementation", International Journal of Current Engineering and Scientific Research (IJCESR), 6(5), pp.2394-0697, 2019.
  7. MALATHI L, S.Munaf, L. Malathi, Dr.A.Bharahi, Dr. A.N.Jayanthi,"Review on Power Dissipation Analysis of Conventional SRAM Cell Architecture", International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 6(11), pp.1764 – 1768, 2017.
  8. MALATHI L, S.Munaf., L. Malathi , , Dr.A.Bharahi , Dr. A.N.Jayanthi,"Review on Power Dissipation Analysis of Conventional SRAM Cell Architecture ", International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 6(11), pp.1764 - 1768, 2017.
  9. MALATHI L, L.Malathi, S.Munaf, Dr.A.Bharathi,, Dr. A.N.Jayanthi,"FPGA Implementation of Compressing Technique In VLSI Multipliers For FFT Architectures", International Journal of Current Engineering and Scientific Research (IJCESR), 4(11), pp.68-72, 2017.
  10. MALATHI L, L. Lakshmi Priya, Dr.M.S.Godwin Premi, T. Boobalan, L. Malathi,"“Design of Novel Filter for the Removal of Gaussian Noise in Plasma Image”", SSRG International Journal of Electronics and Communication Engineering - IJECE, 1(1), pp.64 - 69, 2017.
  11. MALATHI L, L.Malathi,Dr.A.Bharahi,Dr. A.N.Jayanthi,S.Munaf,"Design of Fast Integer Pipelined Multipliers for CMOS 64-bit Synchronous and AsynchronousLogic with Adaptable Latency", International Journal on Recent and Innovation Trends in Computing and Communication (IJRITCC), 5(1), pp.99-102, 2017.
  12. MALATHI L, S. Munaf,Dr. A.N. Jayanthi,L. Malathi,"Automatic RF Alert system to Avoid Vehicle Accident and Rescue using Wireless Control Techniques", International Advanced Research Journal in Science, Engineering and Technology (IARJSET), 4(1), pp.38-41, 2017.
  13. MALATHI L, P.Devi,B.Saranya,L.Malathi,"Finger print Combination by Minutiae and Coordination Extraction for Privacy Protection", International Journal of Latest Trends in Engineering and Technology (IJLTET), 6(3), pp.595-601, 2016.
  14. MALATHI L, P.Narmadhadevi,D.Shanmuga Sundar,L.Malathi,"Performance Analysis of Different Micro Ring Resonators Based on Optical Delay Lines", IJCA (International Journal of Computer Applications), 67(13), pp.4-7, 2013.
  15. MALATHI L, L. Malathi, L. J. Arthiha, R. Kanmani,"FPGA Implementation for Reduced Memory using Scalable Encryption Algorithm", IJECEE (International Journal for Electronics Communication and Electrical Engineers), 4(2), pp.668-670, 2013.